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SYLLABUS

UNIT-I

INTRODUCTION AND BASIC ELECTRICAL PROPERTIES OF MOS CIRCUITS: Introduction to IC technology, Fabrication process: nMOS, pMOs and CMOS, Ids versus Vds Relationships, Aspects of MOS transistor Threshold Voltage, MOS transistor Trans, Output Conductance and Figure of Merit, nMOS Inverter, Pull-up to Pull-down ratio for nMOS inverter driven by another nMOS inverter, and through one or more pass transistors, Alternative forms of pull-up, The CMOS Inverter, Latch-up in CMOS circuits, Bi-CMOS Inverter, Comparison between CMOS and BiCMOS technology.

UNIT-II

MOS AND Bi-CMOS CIRCUIT DESIGN PROCESSES: MOS layers, Stick diagrams, Design Rules and Layout, General observations on the Design rules, 2mm Double Metal, Double Poly, CMOS/Bi-CMOS rules, 1.2mm Double Metal, Double Poly CMOS rules, Layout Diagrams of NAND and NOR gates and CMOS inverter, Symbolic Diagrams – Translation to Mask Form.

UNIT-III

BASIC CIRCUIT CONCEPTS: Sheet Resistance, Sheet Resistance concept applied to MOS transistors and Inverters, Area Capacitance of Layers, Standard unit of capacitance, Some area Capacitance Calculations. The Delay Unit, Inverter Delays, Driving large capacitive loads, Propagation Delays, Wiring Capacitances, Choice of layers. SCALING OF MOS CIRCUITS: Scaling models and scaling factors for device parameters, Limitations of scaling, Limits due to sub threshold currents, Limits on logic levels and supply voltage due to noise and current density. Switch, Gate logic.

UNIT-IV

CHIP INPUT AND OUTPUT CIRCUITS: ESD Protection, Input Circuits, Output Circuits and L(di/dt) Noise, On-Chip clock Generation and Distribution. DESIGN FOR TESTABILITY: Fault types and Models, Controllability and Observability, Ad Hoc Testable Design Techniques, Scan Based Techniques and Built-In Self Test Techniques.

UNIT-V

FPGA DESIGN: FPGA design flow, Basic FPGA architecture, FPGA Technologies, FPGA families, Altera Flex 8000FPGA, Altera Flex 10FPGA, Xilinx XC4000 series FPGA, Xilinx Spartan XL FPGA, Xilinx Spartan II FPGAs, Xilinx Vertex FPGA/Case studies: FPGA Implementation of Half adder and full adder. INTRODUCTION TO SYNTHESIS: Logic synthesis., RTL synthesis. High level Synthesis.

UNIT-VI

INTRODUCTION TO LOW POWER VLSI DESIGN: Introduction to Deep submicron digital IC design, Low Power CMOS Logic Circuits: Over view of power consumption, Low -power design through voltage scaling, Estimation and optimisation of switching activity, Reduction of switching capacitance. Interconnect Design, Power Grid and Clock Design.