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UNIT I NUMBER SYSTEMS AND DIGITAL LOGIC FAMILIES

1.1 Review of number systems, binary codes

1.2 Error detection and error correction codes (Parity and Hamming code)

1.3 Digital Logic Families - comparison of RTL, DTL, TTL, ECL and MOS families -operation, characteristics of digital logic family

UNIT II COMBINATIONAL CIRCUITS

2.1 Combinational logic - representation of logic functions-SOP and POS forms

2.2 K-map representations - minimization using K maps - simplification and implementation of combinational logic

2.3 Multiplexers and demultiplexers

2.4 Code converters

2.5 Adders, subtracters

2.6 Encoders and decoders

UNIT III SYNCHRONOUS SEQUENTIAL CIRCUITS

3.1 Sequential logic

3.2 SR, JK, D and T flip flops

3.3 Level triggering and edge triggering

3.4 Counters, Asynchronous and synchronous type,Modulo counters

3.5 Shift registers

3.6 Design of synchronous sequential circuits - Moore and Melay models - Counters,state diagram,state reduction,state assignment

UNIT IV ASYNCHRONOUS SEQUENTIAL CIRCUITS AND PROGRAMMABILITY LOGIC DEVICES

4.1 Asynchronous sequential logic circuits

4.2 Transition stability, flow stability-race conditions

4.3 Hazards & errors in digital circuits - analysis of asynchronous sequential logic circuits

4.4 Introduction to programmability logic devices: PROM - PLA - PAL, CPLD - FPGA

UNIT V VHDL

5.1 RTL Design - combinational logic

5.2 Sequential circuit - operators

5.3 Introduction to packages - subprograms

5.4 Test bench (Simulation/Tutorial Examples: adders, counters, flip flops, Multiplexers & De multiplexers)